• Participated in the tape-out project of Two-step SAR ADC column readout circuit, responsible for the design and simulation of comparator and CDAC
• Undertook a structured rotational program across core IC design domains
• Conducted an exhaustive survey of nearly two decades of scholarly ADC architecture research

• Leded the tape-out of an asynchronous 10-bit 20Ms/s SAR ADC for industrial sensors, using 4+6 segmented capacitors and low-noise self-calibration comparators
• Authored detailed validation reports and internal technical guides